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    BST82
    N-channel enhancement mode eld-effect transistor
    Rev. 03 — 26 July 2000 Product specication
    c
    c
    1. Description
    N-channel enhancement mode eld-effect transistor in a plastic package using
    TrenchMOS1 technology.
    Product availability:
    BST82 in SOT23.
    2. Features
    s TrenchMOS technology
    s Very fast switching
    s Logic level compatible
    s Subminiature surface mount package.
    3. Applications
    s Relay driver
    s High speed line driver
    s Logic level translator.
    4. Pinning information
    1. TrenchMOS is a trademark of Royal Philips Electronics.
    Table 1: Pinning - SOT23, simplied outline and symbol
    Pin Description Simplied outline Symbol
    1 gate (g)
    SOT23 N-channel MOSFET
    2 source (s)
    3 drain (d)
    1 2
    3
    03ab44
    d
    g
    s
    03ab30
    Philips Semiconductors BST82
    N-channel enhancement mode eld-effect transistor
    Product specication Rev. 03 — 26 July 2000 2 of 13
    9397 750 07223 C Philips Electronics N.V. 2000. All rights reserved.
    5. Quick reference data
    6. Limiting values
    Table 2: Quick reference data
    Symbol Parameter Conditions Typ Max Unit
    VDS drain-source voltage (DC) Tj = 25 to 150 °C 100 V
    ID drain current (DC) Tsp = 25 °C; VGS = 5 V 190 mA
    Ptot total power dissipation Tsp = 25 °C 0.83 W
    Tj junction temperature 150 °C
    RDSon drain-source on-state resistance VGS = 5 V; ID = 150 mA 5 10
    Table 3: Limiting values
    In accordance with the Absolute Maximum Rating System (IEC 60134).
    Symbol Parameter Conditions Min Max Unit
    VDS drain-source voltage (DC) Tj = 25 to 150 °C 100 V
    VDGR drain-gate voltage (DC) Tj = 25 to 150 °C; RGS = 20 k 100 V
    VGS gate-source voltage (DC) ±20 V
    ID drain current (DC) Tsp = 25 °C; VGS = 5 V; Figure 2 and 3 190 mA
    Tsp = 100 °C; VGS = 5 V; Figure 2 120 mA
    IDM peak drain current Tsp = 25 °C; pulsed; tp ≤ 10 μs;
    Figure 3
    0.8 A
    Ptot total power dissipation Tsp = 25 °C; Figure 1 0.83 W
    Tstg storage temperature 65 +150 °C
    Tj operating junction temperature 65 +150 °C
    Source-drain diode
    IS source (diode forward) current (DC) Tsp = 25 °C 190 mA
    ISM peak source (diode forward) current Tsp = 25 °C; pulsed; tp ≤ 10 μs 0.8 A
    Philips Semiconductors BST82
    N-channel enhancement mode eld-effect transistor
    Product specication Rev. 03 — 26 July 2000 3 of 13
    9397 750 07223 C Philips Electronics N.V. 2000. All rights reserved.
    VGS ≥ 5 V
    Fig 1. Normalized total power dissipation as a
    function of solder point temperature.
    Fig 2. Normalized continuous drain current as a
    function of solder point temperature.
    Tsp = 25 °C; IDM is single pulse.
    Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
    03aa17
    0
    20
    40
    60
    80
    100
    120
    0 25 50 75 100 125 150 175
    P
    der
    Tsp (
    o
    C)
    (%)
    03aa25
    0
    20
    40
    60
    80
    100
    120
    0 25 50 75 100 125 150 175
    I
    der
    T
    sp
    (
    o
    C)
    (%)
    Pder
    Ptot
    P
    tot 25 C
    °
    ( )
    100%
    *
    =
    Ider
    ID
    I
    D 25 C
    °
    ( )

    - 100%
    *
    =
    03aa60
    10-3
    10-2
    10-1
    1
    1 10 102 103
    VDS (V)
    ID
    (A)
    D.C.
    100 ms
    10 ms
    RDSon = VDS/ ID
    1 ms
    tp = 10 μs
    100 μs
    Tsp = 25oC
    tp
    tp
    T
    P
    t
    T
    δ =
    Philips Semiconductors BST82
    N-channel enhancement mode eld-effect transistor
    Product specication Rev. 03 — 26 July 2000 4 of 13
    9397 750 07223 C Philips Electronics N.V. 2000. All rights reserved.
    7. Thermal characteristics
    7.1 Transient thermal impedance
    Table 4: Thermal characteristics
    Symbol Parameter Conditions Value Unit
    Rth(j-sp) thermal resistance from junction to solder
    point
    mounted on a metal clad substrate;
    Figure 4
    150 K/W
    Rth(j-a) thermal resistance from junction to ambient mounted on a printed circuit board;
    minimum footprint
    350 K/W
    Mounted on a metal substrate.
    Fig 4. Transient thermal impedance from junction to solder point as a function of
    pulse duration.
    03aa57
    0.1
    1
    10
    102
    103
    10-5 10-4 10-3 10-2 10-1 1 10
    tp (s)
    Zth(j-sp)
    (K/W)
    single pulse
    δ = 0.5
    0.2
    0.1
    0.05
    0.02
    tp
    tp
    T
    P
    t
    T
    δ =
    Philips Semiconductors BST82
    N-channel enhancement mode eld-effect transistor
    Product specication Rev. 03 — 26 July 2000 5 of 13
    9397 750 07223 C Philips Electronics N.V. 2000. All rights reserved.
    8. Characteristics
    Table 5: Characteristics
    Tj = 25 °C unless otherwise specied
    Symbol Parameter Conditions Min Typ Max Unit
    Static characteristics
    V(BR)DSS drain-source breakdown
    voltage
    ID = 10 μA; VGS = 0 V
    Tj = 25 °C 100 130 V
    Tj = 55 °C 89 V
    VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS;
    Figure 9
    Tj = 25 °C 1 2 V
    Tj = 150 °C 0.6 V
    Tj = 55 °C 3.5 V
    IDSS drain-source leakage current VDS = 60 V; VGS = 0 V
    Tj = 25 °C 0.01 1.0 μA
    Tj = 150 °C 10 μA
    IGSS gate-source leakage current VGS = ±20 V; VDS = 0 V 10 100 nA
    RDSon drain-source on-state
    resistance
    VGS = 5 V; ID = 150 mA;
    Figure 7 and 8
    Tj = 25 °C 5 10
    Tj = 150 °C 23
    Dynamic characteristics
    gfs forward transconductance VDS = 5 V; ID = 175 mA;
    Figure 11
    350 mS
    Ciss input capacitance VGS = 0 V; VDS = 10 V;
    f = 1 MHz; Figure 12
    25 40 pF
    Coss output capacitance 8.5 15 pF
    Crss reverse transfer capacitance 5 10 pF
    ton turn-on time VDD = 50 V; RD = 250 ;
    VGS = 10 V; RG = 50 ;
    RGS = 50
    3 10 ns
    toff turn-off time 12 15 ns
    Source-drain diode
    VSD source-drain (diode forward)
    voltage
    IS = 300 mA; VGS = 0 V;
    Figure 13
    0.95 1.5 V
    trr reverse recovery time IS = 300 mA;
    dIS/dt = 100 A/μs;
    VGS = 0 V; VDS = 25 V
    30 ns
    Qr recovered charge 30 nC
    Philips Semiconductors BST82
    N-channel enhancement mode eld-effect transistor
    Product specication Rev. 03 — 26 July 2000 6 of 13
    9397 750 07223 C Philips Electronics N.V. 2000. All rights reserved.
    Tj = 25 °C Tj = 25 °C and 150 °C; VDS > ID * RDSon
    Fig 5. Output characteristics: drain current as a
    function of drain-source voltage; typical values.
    Fig 6. Transfer characteristics: drain current as a
    function of gate-source voltage; typical values.
    Tj = 25 °C
    Fig 7. Drain-source on-state resistance as a function
    of drain current; typical values.
    Fig 8. Normalized drain-source on-state resistance
    factor as a function of junction temperature.
    03aa63
    0
    0.05
    0.1
    0.15
    0.2
    0.25
    0.3
    0.35
    0.4
    0.45
    0.5
    0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
    VDS (V)
    ID
    (A)
    3.5 V
    Tj = 25oC VGS = 10V
    4 V
    3 V
    5 V
    03aa65
    0
    0.1
    0.2
    0.3
    0.4
    0.5
    0.6
    0.7
    0 1 2 3 4 5 6 7 8
    VGS (V)
    ID
    (A) VDS > ID X RDSon
    Tj = 25oC
    150oC
    03aa64
    0
    1
    2
    3
    4
    5
    6
    7
    8
    9
    10
    11
    12
    0 0.1 0.2 0.3 0.4 0.5
    ID (A)
    RDSon
    ()
    VGS = 10V
    Tj = 25oC
    4 V
    3.5V
    3 V
    5 V
    03aa29
    0
    0.2
    0.4
    0.6
    0.8
    1
    1.2
    1.4
    1.6
    1.8
    2
    2.2
    2.4
    2.6
    2.8
    3
    -60 -20 20 60 100 140 180
    T
    j
    (
    o
    C)
    a
    a
    RDSon
    RDSon 25 C
    °
    ( )

    -
    =
    Philips Semiconductors BST82
    N-channel enhancement mode eld-effect transistor
    Product specication Rev. 03 — 26 July 2000 7 of 13
    9397 750 07223 C Philips Electronics N.V. 2000. All rights reserved.
    ID = 1 mA; VDS = VGS Tj = 25 °C; VDS = 5 V
    Fig 9. Gate-source threshold voltage as a function of
    junction temperature.
    Fig 10. Sub-threshold drain current as a function of
    gate-source voltage.
    Tj = 25 °C and 150 °C; VDS > ID * RDSon VGS = 0 V; f = 1 MHz
    Fig 11. Forward transconductance as a function of
    drain current; typical values.
    Fig 12. Input, output and reverse transfer capacitances
    as a function of drain-source voltage; typical
    values.
    03aa34
    0
    0.5
    1
    1.5
    2
    2.5
    3
    -60 -20 20 60 100 140 180
    typ
    min
    V
    GS(th)
    T
    j
    (
    o
    C)
    (V)
    03aa37
    0 0.5 1 1.5 2 2.5 3
    typ
    min
    I
    D
    VGS (V)
    10-6
    10-5
    10-4
    10-3
    10-2
    10-1
    (A)
    03aa66
    0
    0.05
    0.1
    0.15
    0.2
    0.25
    0.3
    0.35
    0.4
    0.45
    0.5
    0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
    ID (A)
    gfs
    (S)
    Tj = 25oC
    150oC
    VDS > ID X RDSon
    03aa68
    1
    10
    102
    10-1 1 10 102
    VDS (V)
    Ciss, Coss,
    Crss (pF)
    Ciss
    Coss
    Crss
    Philips Semiconductors BST82
    N-channel enhancement mode eld-effect transistor
    Product specication Rev. 03 — 26 July 2000 8 of 13
    9397 750 07223 C Philips Electronics N.V. 2000. All rights reserved.
    Tj = 25 °C and 150 °C; VGS = 0 V
    Fig 13. Source (diode forward) current as a function of source-drain (diode forward)
    voltage; typical values.
    03aa67
    0
    0.1
    0.2
    0.3
    0.4
    0.5
    0.6
    0.7
    0.8
    0.9
    1
    0 0.2 0.4 0.6 0.8 1 1.2 1.4
    VSD (V)
    IS
    (A)
    Tj = 25oC
    150oC
    VGS = 0 V
    Philips Semiconductors BST82
    N-channel enhancement mode eld-effect transistor
    Product specication Rev. 03 — 26 July 2000 9 of 13
    9397 750 07223 C Philips Electronics N.V. 2000. All rights reserved.
    9. Package outline
    Fig 14. SOT23.
    UNIT
    A1
    max.
    bp c D E e1 HE Lp Q w
    v
    REFERENCES
    OUTLINE
    VERSION
    EUROPEAN
    PROJECTION
    ISSUE DATE
    97-02-28
    99-09-13
    IEC JEDEC EIAJ
    mm 0.1
    0.48
    0.38
    0.15
    0.09
    3.0
    2.8
    1.4
    1.2
    0.95
    e
    1.9
    2.5
    2.1
    0.55
    0.45
    0.1
    0.2
    DIMENSIONS (mm are the original dimensions)
    0.45
    0.15
    SOT23 TO-236AB
    bp
    D
    e1
    e
    A
    A1
    Lp
    Q
    detail X
    HE
    E
    w M
    v M A
    B
    A
    B
    0 1 2 mm
    scale
    A
    1.1
    0.9
    c
    X
    1 2
    3
    Plastic surface mounted package; 3 leads SOT23
    Philips Semiconductors BST82
    N-channel enhancement mode eld-effect transistor
    Product specication Rev. 03 — 26 July 2000 10 of 13
    9397 750 07223 C Philips Electronics N.V. 2000. All rights reserved.
    10. Revision history
    Table 6: Revision history
    Rev Date CPCN Description
    03 20000726 HZG303 Product specication; third version; supersedes BST82_CNV_2 of 970623.
    Converted from VDMOS (Nijmegen) to TrenchMOS technology (Hazel Grove).
    02 19970623 - Product specication; second version.
    01 19901031 - Product specication; initial version.
    Philips Semiconductors BST82
    N-channel enhancement mode eld-effect transistor
    Product specication Rev. 03 — 26 July 2000 11 of 13
    9397 750 07223 C Philips Electronics N.V. 2000 All rights reserved.
    11. Data sheet status
    [1] Please consult the most recently issued data sheet before initiating or completing a design.
    12. Denitions
    Short-form specication — The data in a short-form specication is
    extracted from a full data sheet with the same type number and title. For
    detailed information see the relevant data sheet or data handbook.
    Limiting values denition — Limiting values given are in accordance with
    the Absolute Maximum Rating System (IEC 60134). Stress above one or
    more of the limiting values may cause permanent damage to the device.
    These are stress ratings only and operation of the device at these or at any
    other conditions above those given in the Characteristics sections of the
    specication is not implied. Exposure to limiting values for extended periods
    may affect device reliability.
    Application information — Applications that are described herein for any
    of these products are for illustrative purposes only. Philips Semiconductors
    make no representation or warranty that such applications will be suitable for
    the specied use without further testing or modication.
    13. Disclaimers
    Life support — These products are not designed for use in life support
    appliances, devices, or systems where malfunction of these products can
    reasonably be expected to result in personal injury. Philips Semiconductors
    customers using or selling these products for use in such applications do so
    at their own risk and agree to fully indemnify Philips Semiconductors for any
    damages resulting from such application.
    Right to make changes — Philips Semiconductors reserves the right to
    make changes, without notice, in the products, including circuits, standard
    cells, and/or software, described or contained herein in order to improve
    design and/or performance. Philips Semiconductors assumes no
    responsibility or liability for the use of any of these products, conveys no
    licence or title under any patent, copyright, or mask work right to these
    products, and makes no representations or warranties that these products
    are free from patent, copyright, or mask work right infringement, unless
    otherwise specied.
    Datasheet status Product status Denition [1]
    Objective specication Development This data sheet contains the design target or goal specications for product development. Specication may
    change in any manner without notice.
    Preliminary specication Qualication This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
    Semiconductors reserves the right to make changes at any time without notice in order to improve design and
    supply the best possible product.
    Product specication Production This data sheet contains nal specications. Philips Semiconductors reserves the right to make changes at any
    time without notice in order to improve design and supply the best possible product.
    Philips Semiconductors BST82
    N-channel enhancement mode eld-effect transistor
    Product specication Rev. 03 — 26 July 2000 12 of 13
    9397 750 07223 C Philips Electronics N.V. 2000. All rights reserved.
    Philips Semiconductors - a worldwide company
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    Uruguay: see South America
    Vietnam: see Singapore
    Yugoslavia: Tel. +381 11 3341 299, Fax. +381 11 3342 553
    For all other countries apply to: Philips Semiconductors,
    Marketing Communications,
    Building BE, P.O. Box 218, 5600 MD EINDHOVEN,
    The Netherlands, Fax. +31 40 272 4825
    Internet: http://www.semiconductors.philips.com
    (SCA70)
    C Philips Electronics N.V. 2000. Printed in The Netherlands
    All rights are reserved. Reproduction in whole or in part is prohibited without the prior
    written consent of the copyright owner.
    The information presented in this document does not form part of any quotation or
    contract, is believed to be accurate and reliable and may be changed without notice. No
    liability will be accepted by the publisher for any consequence of its use. Publication
    thereof does not convey nor imply any license under patent- or other industrial or
    intellectual property rights.
    Date of release: 26 July 2000 Document order number: 9397 750 07223
    Contents
    Philips Semiconductors BST82
    N-channel enhancement mode eld-effect transistor
    1 Description 1
    2 Features 1
    3 Applications 1
    4 Pinning information.1
    5 Quick reference data 2
    6 Limiting values.2
    7 Thermal characteristics.4
    7.1 Transient thermal impedance 4
    8 Characteristics.5
    9 Package outline 9
    10 Revision history.10
    11 Data sheet status 11
    12 Definitions 11
    13 Disclaimers.11
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